1. Field of the Invention
The present invention relates to a circuit of a frequency synthesizer accomplished by using a multiphase reference signal source, and more particularly, to a frequency synthesizer capable of generating a signal capable of provinding fine channel resolution, low phase noise, and rapid channel switching speed in system circuits.
2. Description of the Prior Art
With the increase on popularity of radio communication systems, the relevant key circuits are in great demand. In a mobile telephone system, a rapid synchronization between transmitting and receiving terminals is essential to channel building. However, due to the limitation of communication spectrum bandwidth, a break-through shall depend on a high performance frequency synthesizer, which can provide fine channel resolution and high quality output with low phase noise.
In order to achieve both the goals of fine channel resolution and rapid phase locking capability, the mechanism used for a conventional frequency synthesizer is a factional-N phase locked loop as shown in FIG. 1. Wherever a phase locking state is achieved, the output signal F.sub.0 and reference signal F.sub.r should satisfy eq. F.sub.0 =N.f.times.F.sub.r, in which, the coefficient N.f of the fractional-N frequency divider is controlled by a .SIGMA.-.DELTA. modulator. The digital frequency control signal X of the modulator is converted into an analog voltage signal and applied to a loop filter so as to control the voltage controlled oscillator (VCO) to output a predetermined frequency, and meanwhile, the quantization noise introduced by the digital/analog conversion is shifted to a higher frequency band by the .SIGMA.-.DELTA. modulator and removed by the low-pass loop filter.
For eliminating cross talk between the reference signal and quantization noise smoothed out by the .SIGMA.-.DELTA. modulator, system designers have to narrow the loop bandwidth of the phase locked loop to a value lower tan one tenth of reference signal frequency F.sub.r as well as the signal bandwidth of the .SIGMA.-.DELTA. modulator. Such a consideration may reduce phase noise of the output signal and meanwhile increase phase locking time Therefore, to achieve the design goals of fine channel resolution, reduction of system noise, and rapid phase locking capability simultaneously has become an important issue in design consideration for a high performance frequency synthesizer.